Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.
Thermal Conductivity of Ultra Thin Single Crystal Silicon Layers: Part II — Experimental Data and Modeling at High Temperatures
- Views Icon Views
- Share Icon Share
- Search Site
Liu, W, Asheghi, M, & Goodson, KE. "Thermal Conductivity of Ultra Thin Single Crystal Silicon Layers: Part II — Experimental Data and Modeling at High Temperatures." Proceedings of the ASME 2004 International Mechanical Engineering Congress and Exposition. Heat Transfer, Volume 2. Anaheim, California, USA. November 13–19, 2004. pp. 181-189. ASME. https://doi.org/10.1115/IMECE2004-62107
Download citation file: