Abstract

Simultaneous micro- and nanoscale etching of silicon on a wafer-scale is nowadays performed using plasma etching techniques. These plasma techniques, however, suffer from low throughput due to aspect-ratio dependent etch (ARDE) rate, etch lag from changes in feature size, loading effects from increased etch area, and undesirable surface characteristics such as sidewall taper and scalloping, which are particularly problematic at the nanoscale and can affect the etch uniformity. Additionally, the hardware required for plasma etching can be very expensive. A potential alternative, which addresses the above issues with plasma etching is metal assisted chemical etch (MacEtch). To date, however, an integrated micro- and nanoscale MacEtch process, which has uniform and clean (i.e., without nanowire-like defects in microscale areas) etch front has not been presented in the literature. In this work, we present for the first time a feasible process flow for simultaneous micro-and nanoscale silicon etching without nanowire-like defects, which we call integrated micro- and nanoscale MacEtch (IMN-MacEtch). Successful etching of silicon features ranging from 100 nm to 100 μm was achieved with etch rates of about 1.8 μm/min in a single step to achieve features with an aspect ratio (AR) ∼18:1. We thus conclude that the process represents a feasible alternative to current dry etch methods for patterning feature sizes spanning three orders of magnitude.

1 Introduction and Background

Silicon-based devices form the backbone of the micro-electronics industry. Besides the micro-electronics industry, silicon-based devices are key elements in fields such as photovoltaics [14], microfluidics for particle separation [59], optoelectronics [10], biomedical applications [11,12], battery anodes [13], X-ray zone plates [1416], superhydrophobic surfaces [17,18], and SERS-substrates [19], among others. For many of these applications, some level of controlled silicon etching is required at micro- and nanoscales spanning from a few tens of nanometers to a few hundreds of microns depending on the specific application and use-case. In addition to a well-controlled etch, the process needs to be reliable and repeatable, have low defectivity, adequate etch rate and good uniformity, and usually have a good degree of etch anisotropy throughout the process. These silicon etches can be achieved using either dry or wet etch methods [20]. Micro [24,10,2133], nano [3,13,15,16,23,3354], and multiscale [14,17,18] etching has been achieved using these methods, as summarized in Table 1.

Table 1

Summary of select literature works for silicon micro-and nanoscale etching. Dry etching techniques include Cryo-RIE, DRIE and RIE results. Wet etching techniques are mostly MacEtch, but also include electrochemical etching.

Etch scaleEtch typeMultiscale etch uniformityEtch rate (μm/min)aAspect ratiobReferences
MultiscalecSimultaneousWetLarge-scale uniformity with some defectsg1.7917.9This Work
DryeNanowhiskers due to metal porosityh and collapse of nanopillarsi0.42j and 0.1210,000j and 82[14]
HierarchicaldDryUnfavorable scalloping at the micro-and nanoscale-k17[17]
WetfNo nanoscale pattern control and nanopillar collapse0.14100[18]
MicroscaleDryN/A0.96–4.017–98[2123]
WetN/A0.1–10.04–100[2,3,3033,4,10,2429]
NanoscaleDryN/A0.4–4.010–60[13,23,3436]
WetN/A0.083–8.612–625[3,15,4352,16,53,54,33,3742]
Etch scaleEtch typeMultiscale etch uniformityEtch rate (μm/min)aAspect ratiobReferences
MultiscalecSimultaneousWetLarge-scale uniformity with some defectsg1.7917.9This Work
DryeNanowhiskers due to metal porosityh and collapse of nanopillarsi0.42j and 0.1210,000j and 82[14]
HierarchicaldDryUnfavorable scalloping at the micro-and nanoscale-k17[17]
WetfNo nanoscale pattern control and nanopillar collapse0.14100[18]
MicroscaleDryN/A0.96–4.017–98[2123]
WetN/A0.1–10.04–100[2,3,3033,4,10,2429]
NanoscaleDryN/A0.4–4.010–60[13,23,3436]
WetN/A0.083–8.612–625[3,15,4352,16,53,54,33,3742]

Bold font indicates contributions of this work.

a

Etch rate ranges are based on the highest values obtained in the references listed.

b

Aspect ratio is rounded to the nearest integer.

c

Multiscale etch is defined as having micro-and nanoscale features in a single sample. The aspect ratio for these samples is based on the nanoscale features.

d

A hierarchical etch means that micro-and nanoscale features were both present but etched in either separate steps or on top of one another (see Refs. [17,18]).

e

The process was still based on MacEtch but using HF in the gas-phase and temperature control to prevent condensation.

f

The wet etch step was performed only for the overlayed nanoscale features.

g

Defects were attributed to be due to external factors which can be optimized and are addressed in the text.

h

Visible for the multiscale etch results presented by the authors.

i

Nanopillar collapse seen in the nanoscale experiments not in the multiscale zone plates.

j

Aspect ratio and etch rate correspond to nanopillars only not the multiscale features.

k

Etch rate for this work was not reported.

Dry plasma etching of silicon takes place inside a chamber where different gases are flowed and plasma is generated, which leads to the selective removal of silicon, and where a passivating layer is often needed to ensure etch anisotropy. Examples of dry plasma etching techniques include inductively coupled plasma reactive ion etching (ICP-RIE), deep reactive ion etching (DRIE or BOSCH process), and cryogenic-RIE [20,5558]. DRIE, which consists of silicon etch, fluorocarbon passivation and vertical ion etching cycling steps [57], has been shown to be useful for etching strictly nanoscale and high-aspect ratio (∼60:1) features [35] as well as hierarchical micro-and nanoscale structures simultaneously [18]. Additionally, BOSCH™ DRIE can allow for in-process adaptation to improve etch uniformity and reduce the scalloping effects while increasing the attainable aspect ratio across a variety of microscale trench features, though etch stalling and aspect-ratio dependent etching (ARDE) cannot be fully eliminated [22]. As for processes that do not require cycling between etch and passivation, ICP-RIE has recently been reported to achieve ∼7:1 AR features at the nanoscale [34] and Cryogenic-RIE has been reported to achieve ∼22:1 AR nanoscale pillars with etch rates up to 3 μm/min by taking advantage of the self-passivation possible at low temperatures [13]. As shown in Table 1, however, a wide range of aspect ratios and etch rates exists at both the micro-and nanoscales when dry etching is employed. As for multiscale etching, dry plasma etching provides a feasible route for micro-and nanoscale features to be etched hierarchically but issues with sidewall scalloping appear [17]. Lastly, although dry plasma etching techniques are well studied and widely employed, they are limited in scalability (only one wafer can be processed at a time) and require specialized and expensive equipment [56].

Wet etching of silicon has the advantage of very low side wall roughness, it is easy to implement, can enable batch processing of samples with a large enough etchant volume, and can allow for high degrees of etch anisotropy [20,56]. Several types of wet etching are available. Cozzi et al., for example, used a combination of KOH crystallographic wet-etch and HF-H2O2 anodic dissolution under electrical biasing to produce ∼100:1 AR microscale holes, and obtained etch rates up to 10 μm/min [29]. Metal-assisted chemical etching (MacEtch), first described as stain etching in 1997 [59], is another wet-etch alternative, which relies on a metal catalyst to guide anisotropic silicon etching. The process has been largely explained in the literature and its benefits can be summarized as: (i) simple to implement with controllable etch, low-cost, and no specialized equipment requirements, (ii) feature orientation on the substrate can be controlled, (iii) multiple pattern geometries can be generated, (iv) etched features have good crystal properties, and (v) high aspect-ratio features can be obtained [60].

Briefly, MacEtch is an anisotropic etch technique based on a metal-coated silicon substrate that is immersed in a solution containing an oxidizing agent (e.g., H2O2, first used in 2000 [61]) and an acid that can remove silicon oxide (e.g., HF), for which a proper balance and species availability need to exist to avoid porosity or sidewall etching [2,24,26,32,60], and widening of etched pores [44]. When properly tuned, a reduction-oxidation reaction takes place only where the metal is in direct contact with silicon such that the oxide formed is removed by mass transport of the acid [44,45,60], leading to anisotropic silicon etching following the reaction described by Chartier et al. [44]
H2O2+2H+CatalystMetal2H2O+2h+
(1)
Si+nh++6HFH2SiF6+nH++[4n2]H2
(2)
where n is an integer (2, 3, or 4) depending on the molar ratio, which is defined as:
ρ=[HF][HF]+[H2O2]
(3)

MacEtch can be used to etch features at a wafer-scale [3,27,41,48]. The resulting etch quality, when mediated by the metal catalyst will be affected by substrate, catalyst, and etchant properties. For the substrate, doping [53,54,62] and crystal orientation [54,6365] will impact the etch results, though etching of polycrystalline silicon is possible [38,43,66]. For the catalyst, nanoparticle size, elemental composition and density [33,44,50,51,60], or film thickness [2,24,28,32,33,45,60] and material composition will have an impact on the etch viability [45], quality of features obtained (such as holes [25,38] or microscale features [2,28,33]), the speed of the reaction [2,32,49,51], and defectivity [2,24,28,33]. The contact, or spacing, between the metal and silicon throughout the duration of etch will impact etch morphology and depth [52,67]. Lastly, changes in etch chemistry may also have an impact by affecting porosity formation and crystallographic direction of the etch [37]. Some evidence also points to potential etch improvements when inducing an electric field on the sample [25,54].

Similar to dry plasma etch techniques, MacEtch is also suitable for etching at both the micro-and nanoscales. At the nanoscale, MacEtch has been used to create nanopillars, pores, and trenches and etch rates between ∼1 μm/min [3] and ∼4 μm/min [49], with local etch rates of approximately 8.6 μm/min [42] achievable in some cases, although etch rates below 1 μm/min are not uncommon in the literature [16,3841]. Wafer-scale nanopatterned substrates are also compatible with light-scattering-based metrology [48], which had been previously developed for plasma-etched silicon substrates [6870]. At the microscale, an etch rate of ∼2.8 μm/min [25] for hole formation has been reported with the use of an added electric bias to assist in the etch process, which is faster than the etch rate obtained for hole formation with a BOSCH™ process [22]. As far as pillar formation, however, catalyst instability limits etch quality [24], and etch rates below 0.5 μm/min using MacEtch [2,4,24,28] fail to outperform even Cryo-RIE, where Henry et al. etched micropillars at ∼0.96 μm/min [21]. An alternative implementation of MacEtch relies on the use of HF in the gaseous state, presented by Romano et al., though the etch rates are also below 1 μm/min [14]. Of note, their work is not a wet etch technique since the sample is not submerged in a solution, but it is a dry MacEtch process wherein HF vapors are released from a vat and oxidation is mediated by atmospheric air, and temperature control is performed to prevent HF condensation on the sample.

Most MacEtch work in the literature has focused on etching features on a single scale. To the best of our knowledge, no work has been presented where the integration of micro-and nanoscale MacEtch is demonstrated without the incidence of nanowire-type defects in microscale areas, where these multiscale features are an intrinsic part of the device, as could be the case for microfluidic devices for nanoparticle separation [5,6] or zone plates [1416], as shown in Fig. 1. The only other multiscale etch process we were able to identify was presented by Romano et al. using a HF-vapor-based process for zone plate fabrication [14]. Although their work achieved high (82:1) multiscale AR and ultrahigh (10,000:1) nanoscale AR, their etch quality at the multiscale was negatively impacted by the presence of widespread nanowire-type defects due to metal layer porosity – which is needed for adequate large-scale etching. Additionally, their results suffered from a very slow etch rate (∼0.4 μm/min). Lastly, this etch technique required appropriate temperature control to prevent condensation and a high-temperature anneal to improve catalyst stability [14], which adds both complexity and sample manipulation requirements to the process. In this work, we present for the first time a feasible approach for scalable integrated micronanoscale MacEtch, which we name integrated micro- and nanoscale MacEtch (IMN-MacEtch), at room temperature and in liquid solution. For this, we demonstrate that using Jet-and-Flash Imprint Lithography (J-FIL)[71] and an Ag/Au catalyst bilayer allows for simultaneous etching of 100 nm (200 nm pitch) nanopillars and 50 μm to 100 μm streets at a rate of ∼1.8 μm/min, approximately five times faster than in Ref. [14], and without widespread nanowhisker defects in the microscale etch areas. Our samples achieve an AR of ∼18:1 without significant catalyst instability. We propose that with further optimization this process presents a feasible option for high-throughput fabrication of silicon devices.

Fig. 1
Multiscale Etch of silicon in the literature. Nano-Deterministic Lateral Displacement device for nanoscale biological sample separation, (a) and (b), scale bars 10 μm and 20 μm, respectively. X-ray zone plates fabricated with a Pt-based MacEtch process in gaseous HF (c). (a) and (b) Reproduced from Wunsch et al. [6] with permission from Springer Nature Nanotechnology. (c) Reproduced from Romano et al. [14], with permission from Royal Society of Chemistry.
Fig. 1
Multiscale Etch of silicon in the literature. Nano-Deterministic Lateral Displacement device for nanoscale biological sample separation, (a) and (b), scale bars 10 μm and 20 μm, respectively. X-ray zone plates fabricated with a Pt-based MacEtch process in gaseous HF (c). (a) and (b) Reproduced from Wunsch et al. [6] with permission from Springer Nature Nanotechnology. (c) Reproduced from Romano et al. [14], with permission from Royal Society of Chemistry.
Close modal

2 Materials and Methods

2.1 Materials.

The substrates for the experiments were single-crystal, 100 mm, P-type, low-doped (1-10 Ω-cm), <100>, 500 μm-thick silicon wafers. Supplied by: Nova Electronic Materials for nanopatterning and thermal oxide experiments, University Wafer for micropatterning experiments, and Pure Wafer for integrated micro/nano-experiments. The adhesion layer (TranSpin) used to coat the wafers before micro- and nanopatterning was provided by Canon Nanotechnologies Inc. Nanopatterning and integrated micro- nanoscale patterning was done with a proprietary polymer provided by Canon Nanotechnologies Inc. Micropatterning experiments were performed using AZ-5209E positive tone photoresist and AZ 1:1 developer (Micro-Chemicals).

2.2 Substrate Preparation.

When required, a solution consisting of a 2:1 mixture of 96% v/v sulfuric acid (H2SO4) and 30% v/v hydrogen peroxide (H2O2) prepared in a quartz tank for 10 min was used. The substrates were then dipped in 49% v/v hydrofluoric acid (HF) for 30 s to remove the surface oxide unless otherwise noted. Next, the TranSpin adhesion layer was spin coated at 4000 RPM for 60 s and baked on a hot plate at 165 °C for 70 s. The wafers were air-cooled with a nitrogen gun and patterned. For micropatterning, a ∼900 nm layer of photoresist was deposited using a spin-coater at 4000 RPM for 60 s and baked at 90 °C for 2 min.

2.3 Substrate Patterning.

An Imprio 1100 Jet-and-Flash nano-imprint Lithography (J-FIL) tool (Molecular Imprints, Inc.) with an imprint template consisting of 100 nm pillars with 200 nm pitch in 1×1 mm2 blocks separated by 100 μm trenches was used for nanopatterning. Micropatterning, on the other hand, consisted of hard-contact lithography using an acrylic clamp made in-house and a mylar photomask provided by CAD/Art Services Inc. based on a repeating grid of micropillars with 10 μm to 50 μm diameters and 20 μm gap as shown on Supplemental Figure S1 (available in the Supplemental Materials on the ASME Digital Collection). The UV exposure was done inside an IntelliRay 400 W UV flood lamp for 12 s. Then a 40 s development step and water quench were performed before a thorough rinsing in a Spin-Rinse-Dry (SRD) tool.

Following both micro- and nanopatterning a residual layer from imprint resist, photoresist and adhesion layer would be left between the pillars such that the silicon substrate was not exposed. This residual layer was removed using a Reactive Ion Etch tool (Oxford Instruments) with a plasma-based polymer etch recipe consisting of a 5  sccm O2 and 70  sccm Ar gas flow mix with a 65 W plasma inside a chamber at 15 mTorr pressure for 55 s for J-FIL defined patterns and 3 min for photolithography defined patterns. An optional photoresist liftoff step was performed after metal deposition for some micropatterned samples prior to wet etch of silicon in accordance with literature [24].

2.4 Metal Layer Deposition.

The metal-catalyst deposition was performed using a physical vapor deposition electron-beam evaporator (CHA Industries) under high vacuum (5×106 Torr). The deposition rate for each metal was 0.2 Å/s for Ag, and 0.4 Å/s for Au. When attempted, Ti was deposited at a rate of 0.2 Å/s.

2.5 Metal-Assisted Chemical Etch.

Following metal catalyst deposition, or liftoff (if applicable), the substrates were placed in a solution consisting of HF, H2O2, and DI-water. Two different etchant chemistries were tested: a 12.5/1 M/M ([HF]/[H2O2]) solution (4:1:4 HF:H2O2:H2O volume ratios), previously used for nanopillar formation [42,48], and a 8.44/0.5 M/M solution (6:1:13 HF:H2O2:H2O volume ratios), similar to the etchant used by Kim et al. for Si micromachining [24]. Etch times were: 30 s in 12.5/1 M/M and 60 s in 8.44/0.4 M/M for nanopatterned samples, and 10 min regardless of etchant chemistry for micropatterned samples. Following etch, all samples were quenched in a DI H2O bath and thoroughly rinsed and dried using clean, dry air (CDA).

2.6 Characterization and Analysis Techniques.

Imaging of the samples was performed using a Field-Emission SEM (FESEM, Zeiss) to obtain critical dimensions and assess the etch quality in a 10 deg tilted cross section view (with respect to the pole-piece normal). Images were then analyzed using NIH's open-source tool “ImageJ” for both micro-and nanopillar samples. Nanopillars were measured across multiple captures where all nanopillars had the same diameter and pitch, whereas for micropillar samples, the etch rate was determined based on the average height of pillars for all pillar dimensions. The mean and standard deviation, as well as min and max values for the etch depth measurements were computed using ImageJ's “Summarize Results” option and converted into actual values based on the following:
hactual=hprojectedcos(10)
(4)

where the actual pillar height (hactual) was estimated from the measured projected height (hprojected). The same conversion was used for the standard deviation. Population sizes for each experiment varied based on the images available for analysis and are presented in Table 2. In text, the data are presented in the form of: Mean (S.D.) where applicable.

Table 2

Summary of etch results for micro, nano, and multiscale patterning. For experiment name, M, microscale; N, nanoscale; MB, Metal-Break; LO = Liftoff; IMN, integrated micro-nanoscale; high, 12.5/1 M/M etchant used; low, 8.44/0.5 M/M etchant used. All microscale samples were etched for 10 min. Nanoscale samples with 12.5/1 (8.44/0.5) M/M solution were etched for 30 (60) seconds. IMN sample was etched for 60 s.

Etch depth (μm)Etch rate (μm/min)
Exp.Catalyst thickness Ag/Au (nm/nm)HF/H2O2 (M/M)MeanaS.D.aMinMaxMeanbS.D.bData points
M_LO_High3/1512.5/112.0690.9948.61313.4961.2070.09938
M_LO_Low3/158.44/0.53.4580.3472.9284.3340.3460.03538
M_MB_High3/1512.5/114.9250.99112.20918.2561.4930.09952
M_MB_Low3/158.44/0.57.5620.5606.6908.7590.7560.05674
N_High3/1512.5/11.4590.1990.9211.8212.9180.398163
N_Low3/158.44/0.51.1120.2610.4711.4651.1120.261113
IMN3/118.44/0.51.7930.1271.2642.0691.7930.127211
Etch depth (μm)Etch rate (μm/min)
Exp.Catalyst thickness Ag/Au (nm/nm)HF/H2O2 (M/M)MeanaS.D.aMinMaxMeanbS.D.bData points
M_LO_High3/1512.5/112.0690.9948.61313.4961.2070.09938
M_LO_Low3/158.44/0.53.4580.3472.9284.3340.3460.03538
M_MB_High3/1512.5/114.9250.99112.20918.2561.4930.09952
M_MB_Low3/158.44/0.57.5620.5606.6908.7590.7560.05674
N_High3/1512.5/11.4590.1990.9211.8212.9180.398163
N_Low3/158.44/0.51.1120.2610.4711.4651.1120.261113
IMN3/118.44/0.51.7930.1271.2642.0691.7930.127211
a

Standard deviation was computed using ImageJ (https://imagej.nih.gov/) for the raw data and divided by the cross section angle as explained in the methods section.

b

Etch rate standard deviation is computed by simple division of Etch depth S.D. and etch time.

3 Results

The results obtained in this work can be divided into three subsets: micropillar etching, nanopillar etching, and micronanoscale etching. The first two subsets were performed as part of a larger experimental space exploration to identify feasible process parameters for multiscale etching, some of which are repeated here and in the supplemental information document, as well as available from the first author's thesis (Ref. [72]). Briefly, the micro-and nanoscale etching results originate from a set of 54 individual experiments aimed at identifying the adequate metal stack, substrate surface oxide thickness, and etching solution composition. The micro/nanoscale etching conditions were performed from further optimizing the metal stack and selecting the substrate conditions and etchant concentration identified to be the best possible for micro-and nanoscale patterning. A summary of the results presented here is shown in Table 2. For all experiments, the etchant is presented as the ratio of HF to H2O2 molar concentration ([HF]/[H2O2] M/M).

3.1 Micropillar Etching.

Micropillar etching results were divided in two conditions: (i) a “metal-break” process where the metal catalyst breaks around the photoresists caps, similar to the J-FIL MacEtch process as described by Mallavarapu et al. [48], and (ii) a photoresist liftoff process, which resembles the process presented by Kim and Khang [24].

3.1.1 Liftoff Micropillar Etching.

The results obtained with the 12.5/1 M/M solution are presented in Fig. 2. Metal catalyst cracking and fin formation could be observed between the pillars, with some widening of features observed as the etch progressed, as well as some collapsed nanowires, which could have resulted from porosity in the catalyst. Pillar height and etch rate across the sample was found to be 12.069 (0.994) μm, and 1.207 (0.099) μm/min, respectively. The range between the tallest and shortest pillars was found to be ∼4.9 μm.

Fig. 2
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 12.5/1 M/M etchant. Photoresist liftoff was performed right before etching: (a) 10 μm pillars, (b) 15 μm pillars, (c)20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i)50 μm pillars. Reproduced with permission from Lema Galindo [72].
Fig. 2
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 12.5/1 M/M etchant. Photoresist liftoff was performed right before etching: (a) 10 μm pillars, (b) 15 μm pillars, (c)20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i)50 μm pillars. Reproduced with permission from Lema Galindo [72].
Close modal

Using the 8.44/0.5 M/M etchant instead caused a large decrease in the etch from slower hole injection rate into silicon and slower oxide removal. The resulting micropillars are shown in Fig. 3. The catalyst stability seems improved as no large fins are visible, but some catalyst breaks are still observed (e.g., Figs. 3(a) and 3(f)). The measured etch depth was 3.458 (0.347) μm for an etch rate of 0.346 (0.035) μm/min close to the results presented by Kim and Khang for very similar conditions [24]. The pillar height range was found to be ∼1.4 μm.

Fig. 3
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 8.44/0.5 M/M etchant. Photoresist liftoff was performed right before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c) 20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i) 50 μm pillars. Reproduced with permission from Lema Galindo [72].
Fig. 3
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 8.44/0.5 M/M etchant. Photoresist liftoff was performed right before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c) 20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i) 50 μm pillars. Reproduced with permission from Lema Galindo [72].
Close modal

3.1.2 Metal-Break Micropillar Etching.

Figure 4 shows results obtained using the 12.5/1 M/M etchant on the metal-break sample. The etch depth achieved across all nine regions was 14.925 (0.991) μm, with an etch rate of 1.493 (0.099) μm/min, or nearly five times faster than the results obtained by Kim and Khang with a similar metal stack but different etchant solution [24]. Large fins resulting from catalyst instability can be observed, as well as nonvertical sidewalls particularly for thinner pillars (Fig. 4(a)). Etch nonuniformity could be observed with the bottom of the etched area showing irregular topography, and some porosity formation at the tops of the features was also evident (Supplemental Figure S2 available in the Supplemental Materials on the ASME Digital Collection). The height range for pillars across the sample was ∼6 μm.

Fig. 4
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 12.5/1 M/M etchant. No photoresist liftoff was performed before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c)20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i)50 μm pillars. Reproduced with permission from Lema Galindo [72].
Fig. 4
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 12.5/1 M/M etchant. No photoresist liftoff was performed before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c)20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i)50 μm pillars. Reproduced with permission from Lema Galindo [72].
Close modal

Decreasing the etchant concentrations to 8.44/0.5 M/M etchant addressed the tapering and catalyst break issues seen in Fig. 4. This improved etch quality is shown in Fig. 5. The etch depth was measured to be 7.562 (0.560) μm, for an etch rate of 0.756 (0.056) μm/min, about 2.5 times faster than Kim and Khang [24], and with very similar etch conditions. Etch uniformity also improved as seen by an apparent smoother surface at the bottom of the pillars. The pillar height range was ∼2.1 μm.

Fig. 5
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 8.44/0.5 M/M etchant. No photoresist liftoff was performed before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c) 20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i) 50 μm pillars. Reproduced with permission from Lema Galindo [72].
Fig. 5
Microscale MacEtch on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst and 8.44/0.5 M/M etchant. No photoresist liftoff was performed before etching. (a) 10 μm pillars, (b) 15 μm pillars, (c) 20 μm pillars, (d) 25 μm pillars, (e) 30 μm pillars, (f) 35 μm pillars, (g) 40 μm pillars, (h) 45 μm pillars, and (i) 50 μm pillars. Reproduced with permission from Lema Galindo [72].
Close modal

3.2 Nanopillar Array Results.

The nanopillar etch results for both etchant concentrations are shown in Fig. 6. Some nonuniform etching was observed, particularly in Figs. 6(a) and 6(d), with local etch nonuniformities shown in Figs. 6(b) and 6(e). The source for this nonuniform etching is not completely understood but we hypothesized it to be due to incomplete residual layer removal, as will be explained in Sec. 4. Evidence of collapse is seen in Fig. 6(c). The pillar heights accomplished were 1.459 (0.199) μm and 1.112 (0.261) μm for the 12.5/1 M/M and 8.44/0.5 M/M etchants, which corresponded to etch rates of 2.918 (0.398) μm/min and 1.112 (0.261) μm/min, and AR ∼12:1 and ∼9:1, respectively. The pillar height range was ∼0.9 μm for the 12.5/1 M/M etchant, and ∼1 μm for the 8.44/0.5 M/M etchant.

Fig. 6
Nanoscale etching on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst. Evidence of etching nonuniformity are clearly visible. (a)–(c) were etched in the 12.5/1 M/M solution. (d)–(f) were etched in the 8.44/0.5 M/M solution. Reproduced with permission from Lema Galindo [72].
Fig. 6
Nanoscale etching on an oxide-free silicon substrate with a 3 nm Ag and 15 nm Au catalyst. Evidence of etching nonuniformity are clearly visible. (a)–(c) were etched in the 12.5/1 M/M solution. (d)–(f) were etched in the 8.44/0.5 M/M solution. Reproduced with permission from Lema Galindo [72].
Close modal

3.3 Integrated Micro-Nanoscale Etching.

Based on the results presented above, integrated micro-and nanoscale etching was performed using the 8.44/0.5 M/M etchant and an optimized metal stack, as explained in Sec. 4. The results for multiscale etching are shown in Fig. 7. The optimal metal stack was found to be 3 nm Ag and 11 nm Au, instead of the 15 nm Au used for the results presented previously. For this multiscale etch, the pillar height was 1.793 (0.127) μm, with an etch rate of 1.793 (0.127) μm/min.

Fig. 7
Integrated Micro- and Nanoscale MacEtch results on an oxide free silicon substrate with a 3 nm Ag and 11 nm Au metal catalyst stack and an 8.44/0.5 M/M etchant. Some evidence of etch nonuniformity at the edge of the nanopillar array is shown in (e).
Fig. 7
Integrated Micro- and Nanoscale MacEtch results on an oxide free silicon substrate with a 3 nm Ag and 11 nm Au metal catalyst stack and an 8.44/0.5 M/M etchant. Some evidence of etch nonuniformity at the edge of the nanopillar array is shown in (e).
Close modal

Some areas of localized etch nonuniformity occurred as shown in Fig. 7(e), which was accounted for in the calculation of the standard deviation in height. Other regions appeared to be dominated by pinhole rather than uniform etching, or localized metal layer defects causing island structures to form in the microscale areas, shown in Supplemental Figure S5 (available in the Supplemental Materials on the ASME Digital Collection). The reason for these defects is not readily apparent but could be attributed to nonuniform residual layer removal or nonuniform catalyst thickness. Since these defects could be optimized for and reduced, the areas with pinhole etching were not taken into account when measuring pillar height. Large areas were observed to be defect-free, however, giving credence to the conclusion that, uniform, and multiscale etch was obtained for the first time in the literature, where 100 nm-diameter pillars with 200 nm pitch and 50 μm to 100 μm trenches with microscale features were etched simultaneously.

4 Discussion

4.1 Catalyst Selection.

Catalyst selection is an important step in developing a feasible MacEtch process. The catalyst needs to be chosen such that the correct potential difference exists between the metal and silicon surface to ensure the reaction can proceed [45]. Furthermore, it is important to consider that different catalysts will exhibit different catalytic activity [49,51], that catalyst bilayers may exhibit improved catalytic activity than a single metal layer [2] and that different bilayers will lead to differences in etch quality [32]. For this work, we originally considered three catalyst compositions: Ti/Au, Ti/Ag/Au, and Ag/Au.

Ti/Au catalyst bilayer, which had been previously shown by our group to work for wafer-scale [48] and ultrahigh aspect-ratio silicon nanopatterning [42], and also shown to work for high-aspect-ratio silicon micropillars [28], as well as holes [27]. Thus, the implementation of a Ti/Au catalyst was a tentative option, but successful implementation for micropillars had been shown to require a thick Au layer (∼40 nm) and low temperature etching, which resulted in very slow etching (∼0.1 μm/min) [28]. This low etch rate would be undesirable for high throughput etching and is furthermore the lowest etch rate for microscale wet etching found in our literature review, summarized in Table 1. Our experiments on substrates similar to those used for individual micro-and nanopatterning experiments showed that using a 0.5 nm Ti and 15 nm Au catalyst resulted in uniform etching at the nanoscale for both etchants (Supplemental Figure S8 available in the Supplemental Materials on the ASME Digital Collection) but failed to produce micropillars regardless of pre-etch treatment of the samples (Supplemental Figures S9C, S9D, S10C, and S10D available in the Supplemental Materials on the ASME Digital Collection). We did not attempt to use a thicker Au layer as we need to ensure that the metal did not form a conformal layer at the nanoscale since nanopatterning relies on the metal-break approach as will be explained later. Mallavarapu et al. had shown that the conformal layer forms at ∼20 nm Au [48]. Using a thinner layer was also disregarded to prevent the formation of nanowhisker-type defects.

As for the Ti/Ag/Au tri-layer, Lin et al. showed it worked for silicon micropatterning with etch rate ∼0.24 μm/min [2]. Thus, a stack consisting of 0.5 nm Ti, 3 nm Ag and 15 nm Au was tested. This stack failed to produce high quality etch results at both micro-and nanoscales (Supplemental Figures S7, S9A, S9B, S10A, and S10B available in the Supplemental Materials on the ASME Digital Collection). The failure was somewhat unexpected as Ti was only used as an adhesion layer which acts as an etch delay that needs to dissolve before the etch can progress [2,28,42,45,48] in MacEtch. The use of a metal tri-layer, however, was discarded as a feasible catalyst for these substrates.

Lastly, an Ag/Au catalyst bilayer has also been used in the literature to achieve microscale etching reliably with a thick Au protective layer on top of Ag [24,32]. High-aspect-ratio nanoscale etching of silicon was also accomplished with this catalyst bilayer by Kim et al., but their catalyst had a thick Ag layer and thin Au [37]. In our work, using a thin Ag and thick Au catalyst yielded successful etching at both the micro-and nanoscales, as presented previously. Furthermore, the etch rate for Ag/Au-MacEtch at the nanoscale was higher than the etch rate obtained for the Ti/Au catalyst for either etchant concentration. The etch rates for the Ag/Au catalyst were 2.918 (0.398) μm/min and 1.112 (0.261) μm/min, whereas the etch rates for the Ti/Au catalyst (Supplemental Table S1 available in the Supplemental Materials on the ASME Digital Collection) were 1.573 (0.075) μm/min and 0.673 (0.0085) μm/min for the 12.5/1 M/M and 8.44/0.5 M/M etchants, respectively. These differences in etch rate appear to be statistically significant for the 12.1/1 M/M etchant but not for the 8.44/0.5 M/M case as the 3-σ confidence interval (CI) of the former is [1.724, 4.112] μm/min, which does not include the mean etch rate for the Ti/Au case, but the 3-σ CI of the latter is [0.329, 1.895] μm/min, which does encompass the mean etch rate for the 8.44/0.5 M/M Ti/Au case. It should be noted, however, that the incidence of defects for the Ag/Au-catalyzed case, shown in Fig. 6 led to the large standard deviations in etch rates for this case compared to the more uniform etch obtained with the Ti/Au catalyst (Supplemental Figure S8 available in the Supplemental Materials on the ASME Digital Collection). These defects are hypothesized to be due to incomplete residual layer removal and surface defects, contaminants, or variations in metal thickness causing localized areas of conformal metal layer formation. Both of these defects would inhibit MacEtch locally. Localized incomplete residual layer removal, or contaminants affecting pattern definition and imprint resist spreading and thickness are more likely the reason for nonuniform etch, since no reason for metal thickness variation is readily apparent given the equipment used for metal deposition. In any case, these issues result from external factors that cannot be easily controlled and represent nonrepeatable sources of error. Regarding incomplete residual layer removal, potential causes could be plasma uniformity in the etch chamber, whereas surface contamination could result from manual handling and transport of the samples or contaminants present on the nano-imprint template. The residual layer could also be affected by issues with the inkjet that dispenses the imprint resist on the substrate for J-FIL, which could cause thickness variation in the residual layer. Although these issues are nonrepeatable and difficult to predict, some steps could be taken to resolve or mitigate them. First, residual layer removal can be improved by increasing the plasma etch time before metal deposition, but a limit exists in which the polymer features would be negatively impacted. Next, recurrent cleaning of the imprint template and careful manipulation of the template and sample can decrease the incidence of surface contaminants, although particle contamination can never be fully prevented in a laboratory setting where human intervention is involved.

A final, but important, remark regarding the choice of catalyst, is the observed instability of Ag in MacEtch, which could lead to dissolution and redeposition of silver causing defects [24,26,7376]. This dissolution and redeposition behavior is shown to depend on the etchant concentration ratio, ρ (Eq. 3) [73]. No Ag instability would have been expected for the catalyst concentrations used here, which will be expanded later. Silicon erosion is seen, however, particularly at the tops of micropillars etched in the 12.5/1 M/M solution with a metal-break approach to etch (Supplemental Figure S2 available in the Supplemental Materials on the ASME Digital Collection). This dissolution might have been mitigated by the addition of an Au layer on top, similar to other works [24,37]. The addition of HCl was also shown to help improve silver-instability issues [76], but it was not considered for our work.

4.2 Substrate Treatment.

As stated in the methods section, the samples used to obtain the results presented here were pretreated with HF to remove any surface oxide present prior to photopatterning or J-FIL. This was done in an attempt to better match the substrate preparation performed by Kim and Khang [24], but turned out to be the ideal substrate for our IMN-MacEtch process as well. It is important to note, however, that the silicon surface begins to oxidize immediately upon exposure to room temperature air [77]. Thus, these samples were not truly oxide-free, but instead had a surface oxide thickness less than native silicon oxide. To compare the etch results with different oxide conditions, native oxide and 25 nm-thermal oxide substrates were also etched using the Ag/Au catalyst and are presented in the supplement. On samples with a native oxide, nanopillar etching with the 8.44/0.5 M/M etchant (Supplemental Figure S12 available in the Supplemental Materials on the ASME Digital Collection) and metal-break micropillar etching with the 12.5/1 M/M etchant (Supplemental Figure S14 available in the Supplemental Materials on the ASME Digital Collection) were the only cases that yielded potentially useful results. The mismatched etchant, however, meant that further exploration was disregarded. Thermal-oxide samples only yielded satisfactory results at the nanoscale, though similar issues with etch uniformity were present as in the oxide-free case (Supplemental Figure S13 available in the Supplemental Materials on the ASME Digital Collection). No microscale etching could be achieved with an Ag/Au catalyst on 25 nm-oxide samples (Supplemental Figure S16 and S18 available in the Supplemental Materials on the ASME Digital Collection). The reason for why oxide layers cause different results is not readily apparent. Mallavarapu et al. had studied how oxide could be used to improve the metal-break to yield better etch uniformity, but this process required a plasma etch of the oxide to assist with metal-break rather than starting with a blanket oxide film [48].

A potential reason for the influence of oxide could be that it provides a uniform starting point for the etch reaction where HF first removes all oxide present before the catalyst is in contact with silicon. Since the catalyst has to sink, this may improve the metal-break around the polymer pattern caps by breaking the catalyst in areas where the layer would otherwise be conformal. This may be more noticeable with a thick thermal oxide rather than native oxide which tends to be <5 nm thick. Furthermore, thermal oxide may have a more uniform surface topology than native oxide does. It could happen, however, that too thick an oxide layer could lead to catalyst delamination and thus no MacEtch. The influence of oxide layers requires further investigation to draw conclusions about the ways in which MacEtch can be optimized.

Other catalyst and oxide combinations were also tested in the initial experimental space exploration [72], but are not included here. The only process where an overlap existed in catalyst type, etchant concentration, and substrate type was for the Ag/Au process presented herein.

4.3 Effect of Etchant Concentration.

The concentration of chemical species in the etchant has an impact on the etch rate and feature quality for the silicon micro-and nanostructures [24,26,37], as well as potentially affect stress evolution on the metal film [67]. Increasing peroxide is shown to increase the etch rate [78], but too much peroxide can cause the hole injection to exceed the rate of oxide consumption and lead to hole diffusion which then causes porosity and lateral etching [62]. Lateral etching and porosity formation can be problematic when attempting to etch deep-vertical trenches [26] or microscale features [24]. Increased peroxide concentration can also lead to uncontrolled dissolution of silver [73], which could greatly impact the etch quality given our Ag/Au catalyst bilayer. Too much HF could lead to stress accumulation on the film [67], but it can be used to address porosity and sidewall tapering [24,26]. Additionally, Chartier et al. showed that the relative concentration of the chemical species will impact the etch regime and thus the final results [44].

Our results agreed with literature in an increased etch rate for the higher concentration of chemical species [26], and also showed that whenever the etch rate was slower, better etch quality was obtained [28,78]. The etch rate reduction between the 12.5/1 and 8.44/0.5 M/M solutions was ∼71%, ∼49%, and ∼62% for the liftoff microscale, metal-break microscale and nanoscale etching samples, respectively. For microscale samples presented in Figs. 25, the decrease in etch rate led to successful prevention of catalyst failure, which would result in prominent fin formation (Figs. 2 and 4), though some instability was still occasionally seen with the weaker etchant. In the case of liftoff samples (Fig. 3), however, some of the catalyst damage may have been induced by the ultrasonication step for resist removal. The improved catalyst stability for a slower etch rate can be attributed slowing of hole injection to better match the oxide removal rate, and to an overall slower reaction allowing for more uniform removal of material across the entire etch area even for large lateral dimensions. If the material removal is more uniform, then the strain accumulation on the film will not reach a critical magnitude that enables crack formation and propagation, which seems to agree with the observations made by Wendisch et al. for nanoscale etching [78]. A more thorough mechanical analysis of the bilayer film for microscale etching is necessary, however, to fully understand the failure mechanisms and optimize process parameters to maximize etch rate and minimize catalyst failure. Overall, the primary concern was not the etch rate, but to obtain a high-quality multiscale etch. Hence, the sacrifice in etch rate was acceptable in order to prevent the types of catalyst failure observed at the microscale. Additionally, the etch rate for the multiscale sample was higher than the etch rate for the micro-and nanoscale samples, which is explained in a later section.

4.4 Liftoff Versus Metal-Break.

Resist liftoff has been performed for MacEtch at both the micro [2,3,14,16,24,28,30,31] and nanoscales [3,1416,39,40]. Metal-break, on the other hand, is a nonstandard process, though it is also represented in the literature for MacEtch micro [4,25,27] and nanopatterning [37,38,4143,48]. When comparing both approaches, it is apparent that liftoff has some advantages, which can be seen in Sec. 2.1. In particular, from the 12.5/1 M/M etch results following liftoff, a ∼90 deg angle with no visible erosion or porosity forms at the top of the micropillar features (Fig. 2), whereas the metal-break sample etched under the same conditions resulted in visible porosity and rounding at the top of the silicon features (Supplemental Figure S2 available in the Supplemental Materials on the ASME Digital Collection), and scalloping and sidewall tapering, the latter of which is clearly visible on the smaller micropillars (e.g., Figs. 4(a) and 4(b)). This tapering and scalloping was not observed for the liftoff case, but some pillars did exhibit what appeared to be a step change in width after a certain etch depth (e.g., Figs. 2(g) and 2(i)). In the metal-break case, the scalloping appears visually similar to the scalloping effect of DRIE, but the reason for its presence in MacEtch is not readily apparent. The tapering and widening of features at the base of the etch front could be caused by a lateral shrinking of the catalyst, but the reason for this observation also remains unexplained and is subject to further investigation. These defects were successfully addressed by decreasing the etchant concentration to 8.44/0.5 M/M.

As for the pillar-top erosion and porosity formation observed for metal-break but not liftoff, we hypothesize this could be due to the available surface area for excess hole accumulation and unintended etching. When excess holes diffuse to the top of the pillars, similar to the schematic presented by Asano et al. [26], they cause nonlocalized silicon oxidation, which the HF species can remove. In the case of metal-break, a polymer block exists at the top surface of the silicon feature which prevents the holes that accumulate at that surface from partaking in the oxidation and removal of silicon, thus only the holes that cause oxidation near the sidewall get etched away. The tops of the features exhibit more prominent defectivity and porosity because the unprotected sidewall top gets exposed to the etchant solution for longer. In the case of liftoff, the entire micropillar top area is exposed to the etchant and thus any holes that diffuse may distribute and get etched away more evenly from the whole top surface, thus mitigating the impact of sidewall etching and resulting in a form of electropolishing or uniform surface etching by HF alone. The improvement observed when decreasing the etchant concentration for the metal-break case could be due to the decreased number of holes being injected on the silicon, and thus mitigating porosity formation. Another possible source of porosity could be attributed to the increase in silver availability in the metal-break case as the metal catalyst that sits atop the photoresist is exposed to the etchant for a long period of time. As mentioned, silver has been shown to dissolve and redeposit due to its instability in the MacEtch solution and cause porosity-like defects and/or isotropic etching [24,26,7376]. We discard this hypothesis, however, as no silver dissolution would have been expected for the molar ratios of either solution, based on the analysis performed by Williams et al. [73], since ρ = 0.93 for 12.5/1 M/M and ρ = 0.94 for 8.44/0.5 M/M solutions.

Metal-break, however, does have advantages over liftoff. First, performing liftoff after metal deposition leads to the concern that the released metal may redeposit elsewhere on the sample leading to unintended etching and yield-impacting defectivity, and ultrasonication of the sample for resist removal, as performed in our case, could potentially damage the metal catalyst and cause defects. These risks are removed with the metal-break process as the metal in contact with the polymer resist is not released into solution, and the sample is not subjected to ultrasonication or other mechanical perturbations. Additionally, liftoff requires that the resist have an undercut profile for metal deposition [79]. Although this can be achieved with some forms of lithography, obtaining an undercut profile is not possible with nano-imprint. As such, liftoff could result in metal tears or delamination if any metal is attached to the sidewall of the imprint resist. There are ways to create oxide undercuts for nano-imprint-defined features, but even this approach was presented as a means to improve metal-break rather than enable liftoff [48]. Lastly, by relying on metal-break, fewer process steps are required for patterning of silicon. Fewer steps would require less manipulation and may decrease the risk of contaminants landing on the sample and thus improve yield.

Finally, as observed in the results presented in this work, metal-break led to an increased etch rate for both etchant concentrations. With the 12.5/1 M/M solution, the etch rate increased from 1.207 (0.099) μm/min for liftoff to 1.493 (0.099) μm/min for metal-break. With the 8.44/0.5 M/M solution, on the other hand, the etch rate increased from 0.346 (0.035) μm/min to for the 0.756 (0.056) μm/min between liftoff and metal-break. Looking at the 3-σ CI for the metal-break sample etched using the 12.5/1 M/M solution, the mean etch rate of the liftoff sample is contained within the CI: [1.196,1.790] μm/min and thus the difference may not be statistically significant. This is not the case for the samples etched with the 8.44/0.5 M/M solution where the 3-σ CI is [0.588,0.924] μm/min. The reason for this difference in etch rate is not readily apparent, nor is it clear that this is a systematic difference. Further investigation was not performed, however, as metal-break is the preferable method for MacEtch of silicon with nano-imprint-based patterning.

4.5 Multiscale Etching.

Successful IMN-MacEtch required us to address a handful of issues observed in the single scale etching experiments, some of which have been outlined in the preceding sections. The following discussion, however, focuses only on the metal-break etch process for reasons presented in Sec. 4.4. First, as studied by Geyer et al. [33], for a given catalyst thickness, increasing the lateral etch dimension leads to a decrease in etch rate, and also can cause nonuniform etching across the lateral dimension. Nonuniformities in etching may lead to catalyst bending and strain accumulation which can cause catalyst tears [24,78], as seen in Fig. 4. The issues with catalyst stability were addressed by decreasing the etchant concentration (Fig.  5), agreeing with the observation that a slower etch decreases defectivity [28,78]. The difference in etch rate between scales remained, however, where using the 8.44/0.5 M/M etchant resulted in a microscale mean etch rate of 0.756 μm/min and a nanoscale mean etch rate of 1.112 μm/min. It should be noted that the 3-σ CI for the etch rate of the nanoscale samples is [0.329, 1.895] μm/min, which encompasses the mean etch rate of the microscale samples. This indicates that the difference in etch rate may not be statistically significant, though this conclusion comes with the caveat that the nanoscale etch rate had a large standard deviation due to issues with residual layer removal, as mentioned previously. We believe that steps can be taken to improve residual layer removal and thus the measured standard deviation may be artificially high. Nonetheless, the difference in etch rate agrees with literature [33], and interestingly follows the opposite trend of what is observed in dry etching where smaller features etch slower even when the process is optimized, as done by Tang et al. for DRIE [22]. This “inverse” ARDE effect can be explained by the etch mechanism for MacEtch, where the diffusion driven process will be slowed down when the lateral dimension for mass transport is increased. In addition to the difference in mean etch rate for micro-and nanoscale etch results, the nanoscale samples exhibited little to no etch on the microscale streets between nanopillar arrays (Supplemental Figure S3 available in the Supplemental Materials on the ASME Digital Collection). Thus, further process improvements were necessary to achieve a uniform etch rate for micro-and nanoscale areas such that the nanopillar arrays and microscale streets etched simultaneously.

Increasing the etchant concentration was not considered feasible since defects at the microscale could reappear. Therefore, we decided to optimize the catalyst thickness. As observed by Otte et al., lateral penetration of the chemical species for mass transport in MacEtch appears to be at most ∼700 nm [52]. Thus, a catalyst with small pores with <700 nm spacing could lead to uniform etching of large lateral dimensions. It is possible that the 3 nm Ag and 15 nm Au catalyst stack did have pores with that spatial frequency, but these may have been too small to allow for adequate mass transport at the microscale compared to the ∼100 nm lateral spacing present in the nanopillar regions. As presented by Kong et al., gold is expected to remain porous until it reaches ∼40 nm, but the steep etch rate decrease observed between 10 and 40 nm catalyst thickness does show that pore size plays an important role in mass transport [45]. Furthermore, we do not expect the 3 nm Ag layer to form a continuous film. Therefore, the optimization of catalyst thickness was focused on changing the thickness of the gold layer such that the reaction could take place through pores in the film rather than at the edges of the defined patterns, which is a model for MacEtch that has been presented in the literature [2,24,28,32,33,45], and that the transport through these pores occurs at a similar rate as that of the nanopillar arrays to achieve uniform etch at the micro-and nanoscales. As shown in Supplemental Figure S4 (available in the Supplemental Materials on the ASME Digital Collection), at 12 nm, the microscale streets were still etched slower than the nanopillar regions, whereas decreasing it to 10 nm caused a large amount of nanowhiskers to form in the streets, indicative of large pores on the catalyst. Using an 11 nm Au layer, however, led to uniform etch across the nanopillar array and microscale streets, despite some defects still present on some areas of the sample (Fig. 7(e), and Supplemental Figure S5 available in the Supplemental Materials on the ASME Digital Collection). Additionally, a longer plasma etch was attempted with the 3 nm Ag and 11 nm Au layer, but no significant improvements were observed, and defects were still present (Supplemental Figure S6 available in the Supplemental Materials on the ASME Digital Collection). Thus, we opt for a shorter plasma etch time of 55 s, which was the same amount of time used for the individual nanoscale experiments. Further analysis and experimentation is required to improve the sample preparation conditions such that the observed etch defects can be mitigated and yield can be improved for successful scaling to whole wafers, and exploration of batch-scale processing of more than one wafer at a time.

Overall, the optimized catalyst thickness and lower concentration etchant yielded good etch uniformity across large areas with low defectivity at both the micro-and nanoscales simultaneously with a mean etch rate of 1.793 μm/min, which exceeded the mean etch rate for both micro-and nanoscale individual experiments (0.756 μm/min at the microscale, and 1.112 μm/min at the nanoscale). This increase in etch rate can be attributed to the decreased metal thickness improving mass transport during etch. The results obtained achieved an aspect ratio of ∼18:1, without substantial amounts of collapse. There is a possibility that critical point drying similar to the work presented by Chang et al. [40] and longer etch times could help us achieve taller pillars by removing the effects of capillary force collapse [80,81], but tall nanopillars are also limited lateral collapse due to silicon-silicon attraction [82]. Mallavarapu et al. showed that lateral collapse would actually be expected to be the height-limiting factor for 100 nm pillars with 200 nm pitch in the absence of electrostatic repulsion forces [42], thus we did not attempt to maximize the height as collapsed silicon features would not be adequate for applications such as zone plates or microfluidic devices, which we envision as a potential application for our fabrication process as mentioned in Sec. 1.

5 Conclusions and Future Work

This work presents MacEtch-enabled micro-and nanoscale etching of silicon with feature size variation from 100 nm to 100 μm for the first time. Simultaneous micro-and nanoscale etching is demonstrated by using a catalyst bilayer consisting of 3 nm Ag and 11 nm Au with an etchant bath with 8.44 M HF and 0.5 M H2O2. Based on the measurements obtained, the pillars have an average AR of 18:1 and were etched at a rate of approximately 1.8 μm/min. To the best of our knowledge, this is the first demonstration of multiscale MacEtch in the literature for feature size variation by three orders of magnitude without any ARDE effects, significant etch lag as the scale changes, or nanowhisker-type defect formation in the microscale etch areas as was observed in the results presented by Romano et al. where multiscale etching was achieved [14]. Furthermore, our multiscale etching results also achieve an etch rate that is five times larger than the multiscale MacEtch results presented by Romano et al. [14], though our aspect-ratio is lower. We also find that decreasing the gold layer thickness leads to porosity-induced defects in the microscale areas, whereas increasing gold thickness causes etch rate disparity between nanoscale and microscale areas. Overall, the feasibility of using a thin Ag and thick Au catalyst at the microscale is in agreement with results presented in the literature [24,32], though nanoscale results in the literature for an Ag/Au catalyst had the opposite relative catalyst thicknesses [37]. Dependence of etchant concentration on etch quality is clearly shown at the microscale, and the need for a slow etch to accomplish higher quality features, documented in the literature [28,78], is validated experimentally regardless of pretreatment of the sample prior to etch (i.e., metal-break or liftoff).

Even with the optimized catalyst thickness, some localized defects are still observed on the sample, which negatively impact yield. We hypothesize these defects result from nonrepeatable and unpredictable sources of error, such as plasma uniformity issues in residual layer removal, the introduction of contaminants as a consequence of manual handling of the sample, or local nonuniformities in the thin-film metal catalyst layer leading to differences in etch catalysis or the inhibition of etch altogether. Addressing, and minimizing, the potential for these errors is left to future work for the development of wafer-scale IMN-MacEtch. Additional future work also includes the development of application-specific process flows for silicon-based devices for applications such as nano-Deterministic Lateral Displacement devices for the point-of-care medical diagnostic field [5,6] or zone plates for applications such as X-ray optics, for which MacEtch-based efforts already exist [1416], and which could be fabricated with liquid etchant and without residual nanowires between zone plates observed in the literature [14], thus ensuring high quality definition of the patterned features without the need for temperature control. Lastly, process automation and minimization of human intervention remain long-term goals for the introduction of MacEtch as a feasible industrial silicon fabrication technique.

Acknowledgment

The authors would like to acknowledge Canon Nanotechnologies Inc., Austin for providing the UV-curable resist for Jet-and-Flash Imprint Lithography and the TranSpin chemical used as an adhesion layer. Parts of this work originated from Raul Lema Galindo's master's thesis for the Master of Science in Engineering degree at The University of Texas at Austin, which is embargoed for publication as of February 2023 but is available upon request from the author. Any opinions, findings and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the views of the National Science Foundation.

Funding Data

  • The National Science Foundation (Award Nos. EEC-1160494 and ECCS-2025227; Funder ID: 10.13039/100000001).

Data Availability Statement

The datasets generated and supporting the findings of this article are obtainable from the corresponding author upon reasonable request.

Nomenclature

ρ =

molar ratio of etchant solution, [HF]/([HF] + [H2O2])

AR =

aspect ratio

References

1.
Li
,
X.
,
2012
, “
Metal Assisted Chemical Etching for High Aspect Ratio Nanostructures: A Review of Characteristics and Applications in Photovoltaics
,”
Curr. Opin. Solid State Mater. Sci.
,
16
(
2
), pp.
71
81
.10.1016/j.cossms.2011.11.002
2.
Lin
,
H.
,
Wu
,
F.
,
Gao
,
P.
, and
Shen
,
W.
,
2019
, “
Shape-Controlled Silicon Microwire Arrays From Au–Ag-Catalyzed Metal-Assisted Chemical Etching for Radial Junction Solar Cells
,”
ACS Appl. Energy Mater.
,
2
(
8
), pp.
5871
5876
.10.1021/acsaem.9b01006
3.
Pan
,
C.
,
Luo
,
Z.
,
Xu
,
C.
,
Luo
,
J.
,
Liang
,
R.
,
Zhu
,
G.
,
Wu
,
W.
,
Guo
,
W.
,
Yan
,
X.
,
Xu
,
J.
,
Wang
,
Z. L.
, and
Zhu
,
J.
,
2011
, “
Wafer-Scale High-Throughput Ordered Arrays of Si and Coaxial Si/Si 1–x Ge x Wires: Fabrication, Characterization, and Photovoltaic Application
,”
ACS Nano
,
5
(
8
), pp.
6629
6636
.10.1021/nn202075z
4.
Um
,
H. D.
,
Kim
,
N.
,
Lee
,
K.
,
Hwang
,
I.
,
Hoon Seo
,
J.
,
Yu
,
Y. J.
,
Duane
,
P.
,
Wober
,
M.
, and
Seo
,
K.
,
2015
, “
Versatile Control of Metal-Assisted Chemical Etching for Vertical Silicon Microwire Arrays and Their Photovoltaic Applications
,”
Sci. Rep.
,
5
(
May
), pp.
1
11
.10.1038/srep11277
5.
Smith
,
J. T.
,
Wunsch
,
B. H.
,
Dogra
,
N.
,
Ahsen
,
M. E.
,
Lee
,
K.
,
Yadav
,
K. K.
,
Weil
,
R.
, et al.,
2018
, “
Integrated Nanoscale Deterministic Lateral Displacement Arrays for Separation of Extracellular Vesicles From Clinically-Relevant Volumes of Biological Samples
,”
Lab Chip
,
18
(
24
), pp.
3913
3925
.10.1039/C8LC01017J
6.
Wunsch
,
B. H.
,
Smith
,
J. T.
,
Gifford
,
S. M.
,
Wang
,
C.
,
Brink
,
M.
,
Bruce
,
R. L.
,
Austin
,
R. H.
,
Stolovitzky
,
G.
, and
Astier
,
Y.
,
2016
, “
Nanoscale Lateral Displacement Arrays for the Separation of Exosomes and Colloids Down to 20 Nm
,”
Nat. Nanotechnol.
,
11
(
11
), pp.
936
940
.10.1038/nnano.2016.134
7.
Davis
,
J. A.
,
Inglis
,
D. W.
,
Morton
,
K. J.
,
Lawrence
,
D. A.
,
Huang
,
L. R.
,
Chou
,
S. Y.
,
Sturm
,
J. C.
, and
Austin
,
R. H.
,
2006
, “
Deterministic Hydrodynamics: Taking Blood Apart
,”
Proc. Natl. Acad. Sci. USA.
,
103
(
40
), pp.
14779
14784
.10.1073/pnas.0605967103
8.
Loutherback
,
K.
,
D'Silva
,
J.
,
Liu
,
L.
,
Wu
,
A.
,
Austin
,
R. H.
, and
Sturm
,
J. C.
,
2012
, “
Deterministic Separation of Cancer Cells From Blood at 10 ML/Min
,”
AIP Adv.
,
2
(
4
), p. 042107.10.1063/1.4758131
9.
Wunsch
,
B. H.
,
Hsieh
,
K. Y.
,
Kim
,
S. C.
,
Pereira
,
M.
,
Lukashov
,
S.
,
Scerbo
,
C.
,
Papalia
,
J. M.
,
Duch
,
E. A.
,
Stolovitzky
,
G.
,
Gifford
,
S. M.
, and
Smith
,
J. T.
,
2021
, “
Advancements in Throughput, Lifetime, Purification, and Workflow for Integrated Nanoscale Deterministic Lateral Displacement
,”
Adv. Mater. Technol.
,
6
(
4
), pp.
1
12
.10.1002/admt.202001083
10.
Qian
,
Y.
,
Magginetti
,
D. J.
,
Jeon
,
S.
,
Yoon
,
Y.
,
Olsen
,
T. L.
,
Wang
,
M.
,
Gerton
,
J. M.
, and
Yoon
,
H. P.
,
2020
, “
Heterogeneous Optoelectronic Characteristics of Si Micropillar Arrays Fabricated by Metal-Assisted Chemical Etching
,”
Sci. Rep.
,
10
(
1
), pp.
1
10
.10.1038/s41598-020-73445-x
11.
Alhmoud
,
H.
,
Brodoceanu
,
D.
,
Elnathan
,
R.
,
Kraus
,
T.
, and
Voelcker
,
N. H.
,
2021
, “
A MACEing Silicon: Towards Single-Step Etching of Defined Porous Nanostructures for Biomedicine
,”
Prog. Mater. Sci.
,
116
(
December 2019
), p.
100636
.10.1016/j.pmatsci.2019.100636
12.
Lin
,
H. I.
,
Kuo
,
S. W.
,
Yen
,
T. J.
, and
Lee
,
O. K.
,
2018
, “
SiNWs Biophysically Regulate the Fates of Human Mesenchymal Stem Cells
,”
Sci. Rep.
,
8
(
1
), pp.
1
9
.10.1038/s41598-018-30854-3
13.
Refino
,
A. D.
,
Yulianto
,
N.
,
Syamsu
,
I.
,
Nugroho
,
A. P.
,
Hawari
,
N. H.
,
Syring
,
A.
,
Kartini
,
E.
, et al.,
2021
, “
Versatilely Tuned Vertical Silicon Nanowire Arrays by Cryogenic Reactive Ion Etching as a Lithium-Ion Battery Anode
,”
Sci. Rep.
,
11
(
1
), pp.
1
15
.10.1038/s41598-021-99173-4
14.
Romano
,
L.
,
Kagias
,
M.
,
Vila-Comamala
,
J.
,
Jefimovs
,
K.
,
Tseng
,
L. T.
,
Guzenko
,
V. A.
, and
Stampanoni
,
M.
,
2020
, “
Metal Assisted Chemical Etching of Silicon in the Gas Phase: A Nanofabrication Platform for X-Ray Optics
,”
Nanoscale Horiz.
,
5
(
5
), pp.
869
879
.10.1039/C9NH00709A
15.
Li
,
K.
,
Wojcik
,
M. J.
,
Divan
,
R.
,
Ocola
,
L. E.
,
Shi
,
B.
,
Rosenmann
,
D.
, and
Jacobsen
,
C.
,
2017
, “
Fabrication of Hard X-Ray Zone Plates With High Aspect Ratio Using Metal-Assisted Chemical Etching
,”
J. Vac. Sci. Technol. B, Nanotechnol. Microelectron. Mater. Process. Meas., Phenom.
,
35
(
6
), p.
06G901
.10.1116/1.4991794
16.
Akan
,
R.
,
Parfeniukas
,
K.
,
Vogt
,
C.
,
Toprak
,
M. S.
, and
Vogt
,
U.
,
2018
, “
Reaction Control of Metal-Assisted Chemical Etching for Silicon-Based Zone Plate Nanostructures
,”
RSC Adv.
,
8
(
23
), pp.
12628
12634
.10.1039/C8RA01627E
17.
Ma
,
Z.
,
Jiang
,
C.
,
Li
,
X.
,
Ye
,
F.
, and
Yuan
,
W.
,
2013
, “
Controllable Fabrication of Periodic Arrays of High-Aspect-Ratio Micro-Nano Hierarchical Structures and Their Superhydrophobicity
,”
J. Micromech. Microeng.
,
23
(
9
), p.
095027
.10.1088/0960-1317/23/9/095027
18.
Kim
,
B. S.
,
Shin
,
S.
,
Shin
,
S. J.
,
Kim
,
K. M.
, and
Cho
,
H. H.
,
2011
, “
Micro-Nano Hybrid Structures With Manipulated Wettability Using a Two-Step Silicon Etching on a Large Area
,”
Nanoscale Res. Lett.
,
6
(
1
), p.
333
.10.1186/1556-276X-6-333
19.
Elsayed
,
M. Y.
,
Gouda
,
A. M.
,
Ismail
,
Y.
, and
Swillam
,
M. A.
,
2017
, “
Silicon-Based SERS Substrates Fabricated by Electroless Etching
,”
J. Light. Technol.
,
35
(
14
), pp.
3075
3081
.10.1109/JLT.2017.2707476
20.
Wu
,
B.
,
Kumar
,
A.
, and
Pamarthy
,
S.
,
2010
, “
High Aspect Ratio Silicon Etch: A Review
,”
J. Appl. Phys.
,
108
(
5
), p.
051101
.10.1063/1.3474652
21.
Henry
,
M. D.
,
Welch
,
C.
, and
Scherer
,
A.
,
2009
, “
Techniques of Cryogenic Reactive Ion Etching in Silicon for Fabrication of Sensors
,”
J. Vac. Sci. Technol. A
,
27
(
5
), pp.
1211
1216
.10.1116/1.3196790
22.
Tang
,
Y.
,
Sandoughsaz
,
A.
,
Owen
,
K. J.
, and
Najafi
,
K.
,
2018
, “
Ultra Deep Reactive Ion Etching of High Aspect-Ratio and Thick Silicon Using a Ramped-Parameter Process
,”
J. Microelectromech. Syst.
,
27
(
4
), pp.
686
697
.10.1109/JMEMS.2018.2843722
23.
Sökmen
,
U.
,
Stranz
,
A.
,
Fündling
,
S.
,
Wehmann
,
H. H.
,
Bandalo
,
V.
,
Bora
,
A.
,
Tornow
,
M.
,
Waag
,
A.
, and
Peiner
,
E.
,
2009
, “
Capabilities of ICP-RIE Cryogenic Dry Etching of Silicon: Review of Exemplary Microstructures
,”
J. Micromech. Microeng.
,
19
(
10
), p. 105005.10.1088/0960-1317/19/10/105005
24.
Kim
,
S.-M.
, and
Khang
,
D.-Y.
,
2014
, “
Bulk Micromachining of Si by Metal-Assisted Chemical Etching
,”
Small
,
10
(
18
), pp.
3761
3766
.10.1002/smll.201303379
25.
Li
,
L.
,
Wu
,
J.
, and
Wong
,
C. P.
,
2015
, “
Wafer-Level Wet Etching of High-Aspect-Ratio Through Silicon Vias (TSVs) With High Uniformity and Low Cost for Silicon Interposers With High-Density Interconnect of 3D Packaging
,”
IEEE 65th Electronic Components and Technology Conference
(
ECTC
),
IEEE
, San Diego, CA, May 26–29, pp.
1417
1422
.10.1109/ECTC.2015.7159783
26.
Asano
,
Y.
,
Matsuo
,
K.
,
Ito
,
H.
,
Higuchi
,
K.
,
Shimokawa
,
K.
, and
Sato
,
T.
,
2015
, “
A Novel Wafer Dicing Method Using Metal-Assisted Chemical Etching
,”IEEE 65th Electronic Components and Technology Conference (
ECTC
),
IEEE
, San Diego, CA, May 26–29, pp.
853
858
.10.1109/ECTC.2015.7159692
27.
Li
,
L.
,
Zhang
,
G.
, and
Wong
,
C. P.
,
2015
, “
Formation of Through Silicon Vias for Silicon Interposer in Wafer Level by Metal-Assisted Chemical Etching
,”
IEEE Trans. Compon., Packag. Manuf. Technol.
,
5
(
8
), pp.
1039
1049
.10.1109/TCPMT.2015.2443728
28.
Yan
,
J.
,
Wu
,
S.
,
Zhai
,
X.
,
Gao
,
X.
, and
Li
,
X.
,
2016
, “
Facile Fabrication of Wafer-Scale, Micro-Spacing and High-Aspect-Ratio Silicon Microwire Arrays
,”
RSC Adv.
,
6
(
90
), pp.
87486
87492
.10.1039/C6RA19104E
29.
Cozzi
,
C.
,
Polito
,
G.
,
Kolasinski
,
K. W.
, and
Barillaro
,
G.
,
2017
, “
Controlled Microfabrication of High-Aspect-Ratio Structures in Silicon at the Highest Etching Rates: The Role of H2O2 in the Anodic Dissolution of Silicon in Acidic Electrolytes
,”
Adv. Funct. Mater.
,
27
(
6
), p.
1604310
.10.1002/adfm.201604310
30.
Miao
,
B.
,
Zhang
,
J.
,
Ding
,
X.
,
Wu
,
D.
,
Wu
,
Y.
,
Lu
,
W.
, and
Li
,
J.
,
2017
, “
Improved Metal Assisted Chemical Etching Method for Uniform, Vertical and Deep Silicon Structure
,”
J. Micromech. Microeng.
,
27
(
5
), p. 055019.10.1088/1361-6439/aa6872
31.
Nur'aini
,
A.
, and
Oh
,
I.
,
2022
, “
Deep Etching of Silicon Based on Metal-Assisted Chemical Etching
,”
ACS Omega
,
7
(
19
), pp.
16665
16669
.10.1021/acsomega.2c01113
32.
Wu
,
R. W.
,
Yuan
,
G. D.
,
Wang
,
K. C.
,
Wei
,
T. B.
,
Liu
,
Z. Q.
,
Wang
,
G. H.
,
Wang
,
J. X.
, and
Li
,
J. M.
,
2016
, “
Bilayer–Metal Assisted Chemical Etching of Silicon Microwire Arrays for Photovoltaic Applications
,”
AIP Adv.
,
6
(
2
), p.
025324
.10.1063/1.4943217
33.
Geyer
,
N.
,
Fuhrmann
,
B.
,
Huang
,
Z.
,
de Boor
,
J.
,
Leipner
,
H. S.
, and
Werner
,
P.
,
2012
, “
Model for the Mass Transport During Metal-Assisted Chemical Etching With Contiguous Metal Films as Catalysts
,”
J. Phys. Chem. C
,
116
(
24
), pp.
13446
13451
.10.1021/jp3034227
34.
Michalska
,
M.
,
Laney
,
S. K.
,
Li
,
T.
,
Tiwari
,
M. K.
,
Parkin
,
I. P.
, and
Papakonstantinou
,
I.
,
2022
, “
A Route to Engineered High Aspect-Ratio Silicon Nanostructures Through Regenerative Secondary Mask Lithography
,”
Nanoscale
,
14
(
5
), pp.
1847
1854
.10.1039/D1NR07024J
35.
Morton
,
K. J.
,
Nieberg
,
G.
,
Bai
,
S.
, and
Chou
,
S. Y.
,
2008
, “
Wafer-Scale Patterning of Sub-40 Nm Diameter and High Aspect Ratio (>50:1) Silicon Pillar Arrays by Nanoimprint and Etching
,”
Nanotechnology
,
19
(
34
), p. 345301.10.1088/0957-4484/19/34/345301
36.
Pruessner
,
M. W.
,
Rabinovich
,
W. S.
,
Stievater
,
T. H.
,
Park
,
D.
, and
Baldwin
,
J. W.
,
2007
, “
Cryogenic Etch Process Development for Profile Control of High Aspect-Ratio Submicron Silicon Trenches
,”
J. Vac. Sci. Technol. B Microelectron. Nanometer Struct.-Process., Meas., Phenom.
,
25
(
1
), p.
21
.10.1116/1.2402151
37.
Kim
,
J.
,
Han
,
H.
,
Kim
,
Y. H.
,
Choi
,
S. H.
,
Kim
,
J. C.
, and
Lee
,
W.
,
2011
, “
Au/Ag Bilayered Metal Mesh as a Si Etching Catalyst for Controlled Fabrication of Si Nanowires
,”
ACS Nano
,
5
(
4
), pp.
3222
3229
.10.1021/nn2003458
38.
Kong
,
L.
,
Zhao
,
Y.
,
Dasgupta
,
B.
,
Ren
,
Y.
,
Hippalgaonkar
,
K.
,
Li
,
X.
,
Chim
,
W. K.
, and
Chiam
,
S. Y.
,
2017
, “
Minimizing Isolate Catalyst Motion in Metal-Assisted Chemical Etching for Deep Trenching of Silicon Nanohole Array
,”
ACS Appl. Mater. Interfaces
,
9
(
24
), pp.
20981
20990
.10.1021/acsami.7b04565
39.
Akan
,
R.
, and
Vogt
,
U.
,
2021
, “
Optimization of Metal-Assisted Chemical Etching for Deep Silicon Nanostructures
,”
Nanomaterials
,
11
(
11
), p.
2806
.10.3390/nano11112806
40.
Chang
,
S.-W.
,
Chuang
,
V. P.
,
Boles
,
S. T.
,
Ross
,
C. A.
, and
Thompson
,
C. V.
,
2009
, “
Densely Packed Arrays of Ultra-High-Aspect-Ratio Silicon Nanowires Fabricated Using Block-Copolymer Lithography and Metal-Assisted Etching
,”
Adv. Funct. Mater.
,
19
(
15
), pp.
2495
2500
.10.1002/adfm.200900181
41.
Ho
,
J.-W.
,
Wee
,
Q.
,
Dumond
,
J.
,
Tay
,
A.
, and
Chua
,
S.-J.
,
2013
, “
Versatile Pattern Generation of Periodic, High Aspect Ratio Si Nanostructure Arrays With Sub-50-Nm Resolution on a Wafer Scale
,”
Nanoscale Res. Lett.
,
8
(
1
), p.
506
.10.1186/1556-276X-8-506
42.
Mallavarapu
,
A.
,
Ajay
,
P.
, and
Sreenivasan
,
S. V.
,
2020
, “
Enabling Ultrahigh-Aspect-Ratio Silicon Nanowires Using Precise Experiments for Detecting the Onset of Collapse
,”
Nano Lett.
,
20
(
11
), pp.
7896
7905
.10.1021/acs.nanolett.0c02539
43.
Barrera
,
C.
,
Ajay
,
P.
,
Mallavarapu
,
A.
,
Hrdy
,
M.
, and
Sreenivasan
,
S. V.
,
2022
, “
Metal Assisted Chemical Etch of Polycrystalline Silicon
,”
J. Micro Nano-Manuf.
,
10
(
2
), pp.
1
6
.10.1115/1.4055401
44.
Chartier
,
C.
,
Bastide
,
S.
, and
Lévy-Clément
,
C.
,
2008
, “
Metal-Assisted Chemical Etching of Silicon in HF–H2O2
,”
Electrochim. Acta
,
53
(
17
), pp.
5509
5516
.10.1016/j.electacta.2008.03.009
45.
Kong
,
L.
,
Dasgupta
,
B.
,
Ren
,
Y.
,
Mohseni
,
P. K.
,
Hong
,
M.
,
Li
,
X.
,
Chim
,
W. K.
, and
Chiam
,
S. Y.
,
2016
, “
Evidences for Redox Reaction Driven Charge Transfer and Mass Transport in Metal-Assisted Chemical Etching of Silicon
,”
Sci. Rep.
,
6
(
1
), p.
36582
.10.1038/srep36582
46.
Fang
,
H.
,
Wu
,
Y.
,
Zhao
,
J.
, and
Zhu
,
J.
,
2006
, “
Silver Catalysis in the Fabrication of Silicon Nanowire Arrays
,”
Nanotechnology
,
17
(
15
), pp.
3768
3774
.10.1088/0957-4484/17/15/026
47.
Cherala
,
A.
,
Chopra
,
M.
,
Yin
,
B.
,
Mallavarapu
,
A.
,
Singhal
,
S.
,
Abed
,
O.
,
Bonnecaze
,
R.
, and
Sreenivasan
,
S. V.
,
2016
, “
Nanoshape Imprint Lithography for Fabrication of Nanowire Ultracapacitors
,”
IEEE Trans. Nanotechnol.
,
15
(
3
), pp.
448
456
.10.1109/TNANO.2016.2541859
48.
Mallavarapu
,
A.
,
Gawlik
,
B.
,
Grigas
,
M.
,
Castaneda
,
M.
,
Abed
,
O.
,
Watts
,
M.
, and
Sreenivasan
,
S. V.
,
2020
, “
Scalable Fabrication and Metrology of Silicon Nanowire Arrays Made by Metal Assisted Chemical Etch
,”
IEEE Trans. Nanotechnol.
,
20
, pp.
83
91
.10.1109/TNANO.2020.3047366
49.
Mallavarapu
,
A.
,
Ajay
,
P.
,
Barrera
,
C.
, and
Sreenivasan
,
S. V.
,
2021
, “
Ruthenium-Assisted Chemical Etching of Silicon: Enabling CMOS-Compatible 3D Semiconductor Device Nanofabrication
,”
ACS Appl. Mater. Interfaces
,
13
(
1
), pp.
1169
1177
.10.1021/acsami.0c17011
50.
Venkatesan
,
R.
,
Arivalagan
,
M. K.
,
Venkatachalapathy
,
V.
,
Pearce
,
J. M.
, and
Mayandi
,
J.
,
2018
, “
Effects of Silver Catalyst Concentration in Metal Assisted Chemical Etching of Silicon
,”
Mater. Lett.
,
221
, pp.
206
210
.10.1016/j.matlet.2018.03.053
51.
Yae
,
S.
,
Morii
,
Y.
,
Fukumuro
,
N.
, and
Matsuda
,
H.
,
2012
, “
Catalytic Activity of Noble Metals for Metal-Assisted Chemical Etching of Silicon
,”
Nanoscale Res. Lett.
,
7
, pp.
1
5
.10.1186/1556-276X-7-352
52.
Otte
,
M. A.
,
Solis-Tinoco
,
V.
,
Prieto
,
P.
,
Borrisé
,
X.
,
Lechuga
,
L. M.
,
González
,
M. U.
, and
Sepulveda
,
B.
,
2015
, “
Tailored Height Gradients in Vertical Nanowire Arrays Via Mechanical and Electronic Modulation of Metal-Assisted Chemical Etching
,”
Small
,
11
(
33
), pp.
4201
4208
.10.1002/smll.201500175
53.
Zhang
,
M. L.
,
Peng
,
K. Q.
,
Fan
,
X.
,
Jie
,
J. S.
,
Zhang
,
R. Q.
,
Lee
,
S. T.
, and
Wong
,
N. B.
,
2008
, “
Preparation of Large-Area Uniform Silicon Nanowires Arrays Through Metal-Assisted Chemical Etching
,”
J. Phys. Chem. C
,
112
(
12
), pp.
4444
4450
.10.1021/jp077053o
54.
Huang
,
Z. P.
,
Geyer
,
N.
,
Liu
,
L. F.
,
Li
,
M. Y.
, and
Zhong
,
P.
,
2010
, “
Metal-Assisted Electrochemical Etching of Silicon
,”
Nanotechnology
,
21
(
46
), p.
465301
.10.1088/0957-4484/21/46/465301
55.
Huff
,
M.
,
2021
, “
Recent Advances in Reactive Ion Etching and Applications of High-Aspect-Ratio Microfabrication
,”
Micromachines
,
12
(
8
), p.
991
.10.3390/mi12080991
56.
Laermer
,
F.
,
Franssila
,
S.
,
Sainiemi
,
L.
, and
Kolari
,
K.
,
2020
, “
Deep Reactive Ion Etching
,”
Handbook of Silicon Based MEMS Materials and Technologies
,
Elsevier
, Amsterdam, The Netherlands, pp.
417
446
.
57.
Vigna
,
B.
,
2022
,
Silicon Sensors and Actuators
,
Springer International Publishing
,
Cham, Switzerland
.
58.
Donnelly
,
V. M.
, and
Kornblit
,
A.
,
2013
, “
Plasma Etching: Yesterday, Today, and Tomorrow
,”
J. Vac. Sci. Technol., A
,
31
(
5
), p.
050825
.10.1116/1.4819316
59.
Dimova-Malinovska
,
D.
,
Sendova-Vassileva
,
M.
,
Tzenov
,
N.
, and
Kamenova
,
M.
,
1997
, “
Preparation of Thin Porous Silicon Layers by Stain Etching
,”
Thin Solid Films
,
297
(
1–2
), pp.
9
12
.10.1016/S0040-6090(96)09434-5
60.
Huang
,
Z.
,
Geyer
,
N.
,
Werner
,
P.
,
de Boor
,
J.
, and
Gösele
,
U.
,
2011
, “
Metal-Assisted Chemical Etching of Silicon: A Review
,”
Adv. Mater.
,
23
(
2
), pp.
285
308
.10.1002/adma.201001784
61.
Li
,
X.
, and
Bohn
,
P. W.
,
2000
, “
Metal-Assisted Chemical Etching in HF/H2O2 Produces Porous Silicon
,”
Appl. Phys. Lett.
,
77
(
16
), pp.
2572
2574
.10.1063/1.1319191
62.
Jo
,
J. S.
, and
Jang
,
J. W.
,
2021
, “
Optimized Hole Injection, Diffusion, and Consumption for Efficient Metal-Assisted Chemical Etching Depending on the Silicon Doping Type and Metal Catalyst Area
,”
J. Phys. Chem. C
,
125
(
41
), pp.
22713
22723
.10.1021/acs.jpcc.1c04104
63.
Peng
,
K.
,
Zhang
,
M.
,
Lu
,
A.
,
Wong
,
N. B.
,
Zhang
,
R.
, and
Lee
,
S. T.
,
2007
, “
Ordered Silicon Nanowire Arrays Via Nanosphere Lithography and Metal-Induced Etching
,”
Appl. Phys. Lett.
,
90
(
16
), pp.
1
4
.10.1063/1.2724897
64.
Peng
,
K.
,
Lu
,
A.
,
Zhang
,
R.
, and
Lee
,
S. T.
,
2008
, “
Motility of Metal Nanoparticles in Silicon and Induced Anisotropic Silicon Etching
,”
Adv. Funct. Mater.
,
18
(
19
), pp.
3026
3035
.10.1002/adfm.200800371
65.
Huang
,
Z.
,
Shimizu
,
T.
,
Senz
,
S.
,
Zhang
,
Z.
,
Zhang
,
X.
,
Lee
,
W.
,
Geyer
,
N.
, and
Gösele
,
U.
,
2009
, “
Ordered Arrays of Vertically Aligned [110] Silicon Nanowires by Suppressing the Crystallographically Preferred 〈100〉 Etching Directions
,”
Nano Lett.
,
9
(
7
), pp.
2519
2525
.10.1021/nl803558n
66.
Kim
,
J. D.
,
Kim
,
M.
,
Kong
,
L.
,
Mohseni
,
P. K.
,
Ranganathan
,
S.
,
Pachamuthu
,
J.
,
Chim
,
W. K.
,
Chiam
,
S. Y.
,
Coleman
,
J. J.
, and
Li
,
X.
,
2018
, “
Self-Anchored Catalyst Interface Enables Ordered Via Array Formation From Submicrometer to Millimeter Scale for Polycrystalline and Single-Crystalline Silicon
,”
ACS Appl. Mater. Interfaces
,
10
(
10
), pp.
9116
9122
.10.1021/acsami.7b17708
67.
Lai
,
C. Q.
,
Cheng
,
H.
,
Choi
,
W. K.
, and
Thompson
,
C. V.
,
2013
, “
Mechanics of Catalyst Motion During Metal Assisted Chemical Etching of Silicon
,”
J. Phys. Chem. C
,
117
(
40
), pp.
20802
20809
.10.1021/jp407561k
68.
Gawlik
,
B.
,
Barr
,
A. R.
,
Mallavarapu
,
A.
,
Yu
,
E. T.
, and
Sreenivasan
,
S. V.
,
2021
, “
Spectral Imaging and Computer Vision for High-Throughput Defect Detection and Root-Cause Analysis of Silicon Nanopillar Arrays
,”
J. Micro Nano-Manuf.
,
9
(
1
), pp.
1
9
.10.1115/1.4049959
69.
Gawlik
,
B.
,
Barrera
,
C.
,
Yu
,
E. T.
, and
Sreenivasan
,
S. V.
,
2020
, “
Hyperspectral Imaging for High-Throughput, Spatially Resolved Spectroscopic Scatterometry of Silicon Nanopillar Arrays
,”
Opt. Express
,
28
(
10
), p.
14209
.10.1364/OE.388158
70.
Gawlik
,
B. M.
,
Cossio
,
G.
,
Kwon
,
H.
,
Jurado
,
Z.
,
Palacios
,
B.
,
Singhal
,
S.
,
Alù
,
A.
,
Yu
,
E. T.
, and
Sreenivasan
,
S. V.
,
2018
, “
Structural Coloration With Hourglass-Shaped Vertical Silicon Nanopillar Arrays
,”
Opt. Express
,
26
(
23
), p.
30952
.10.1364/OE.26.030952
71.
Sreenivasan
,
S. V.
,
2008
, “
Nanoscale Manufacturing Enabled by Imprint Lithography
,”
MRS Bull.
,
33
(
9
), pp.
854
863
.10.1557/mrs2008.181
72.
Lema Galindo
,
R.
,
2021
, “
Integrated Fabrication of Micro- and Nano-Scale Structures for Silicon Devices Enabled by Metal-Assisted Chemical Etch
,” thesis,
University of Texas at Austin, Austin, TX
.
73.
Williams
,
M. O.
,
Hiller
,
D.
,
Bergfeldt
,
T.
, and
Zacharias
,
M.
,
2017
, “
How the Oxidation Stability of Metal Catalysts Defines the Metal-Assisted Chemical Etching of Silicon
,”
J. Phys. Chem. C
,
121
(
17
), pp.
9296
9299
.10.1021/acs.jpcc.6b12362
74.
Hu
,
Y.
,
Jin
,
C.
,
Liu
,
Y.
,
Yang
,
X.
,
Liao
,
Z.
,
Zhang
,
B.
,
Zhou
,
Y.
,
Chen
,
A.
,
Wu
,
L.
,
Liu
,
J.
, and
Peng
,
K.
,
2021
, “
Metal Particle Evolution Behavior During Metal Assisted Chemical Etching of Silicon
,”
ECS J. Solid State Sci. Technol.
,
10
(
8
), p.
084002
.10.1149/2162-8777/ac17be
75.
Li
,
L.
,
Holmes
,
C. M.
,
Hah
,
J.
,
Hildreth
,
O. J.
, and
Wong
,
C. P.
,
2015
, “
Uniform Metal-Assisted Chemical Etching and the Stability of Catalysts
,”
Mater. Res. Soc. Symp. Proc.
,
1801
, pp.
1
8
.10.1557/opl.2015.574
76.
Williams
,
M. O.
,
Jervell
,
A. L. H.
,
Hiller
,
D.
, and
Zacharias
,
M.
,
2018
, “
Using HCl to Control Silver Dissolution in Metal-Assisted Chemical Etching of Silicon
,”
Phys. Status Solidi Appl. Mater. Sci.
,
215
(
18
), p.
1800135
.10.1002/pssa.201800135
77.
Morita
,
M.
,
Ohmi
,
T.
,
Hasegawa
,
E.
,
Kawakami
,
M.
, and
Ohwada
,
M.
,
1990
, “
Growth of Native Oxide on a Silicon Surface
,”
J. Appl. Phys.
,
68
(
3
), pp.
1272
1281
.10.1063/1.347181
78.
Wendisch
,
F. J.
,
Rey
,
M.
,
Vogel
,
N.
, and
Bourret
,
G. R.
,
2020
, “
Large-Scale Synthesis of Highly Uniform Silicon Nanowire Arrays Using Metal-Assisted Chemical Etching
,”
Chem. Mater.
,
32
(
21
), pp.
9425
9434
.10.1021/acs.chemmater.0c03593
79.
Hatzakis
,
M.
,
Canavello
,
B. J.
, and
Shaw
,
J. M.
,
1980
, “
Single-Step Optical Lift-Off Process
,”
IBM J. Res. Dev.
,
24
(
4
), pp.
452
460
.10.1147/rd.244.0452
80.
Chandra
,
D.
, and
Yang
,
S.
,
2010
, “
Stability of High-Aspect-Ratio Micropillar Arrays Against Adhesive and Capillary Forces
,”
Acc. Chem. Res.
,
43
(
8
), pp.
1080
1091
.10.1021/ar100001a
81.
Chandra
,
D.
, and
Yang
,
S.
,
2009
, “
Capillary-Force-Induced Clustering of Micropillar Arrays: Is It Caused by Isolated Capillary Bridges or by the Lateral Capillary Meniscus Interaction Force?
,”
Langmuir
,
25
(
18
), pp.
10430
10434
.10.1021/la901722g
82.
Glassmaker
,
N. J.
,
Jagota
,
A.
,
Hui
,
C.-Y.
, and
Kim
,
J.
,
2004
, “
Design of Biomimetic Fibrillar Interfaces: 1. Making Contact
,”
J. R. Soc. Interface
,
1
(
1
), pp.
23
33
.10.1098/rsif.2004.0004

Supplementary data